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一、崗位職責(zé)Responsibilities: 1. 掌握使用 Xilinx Kintex Ultrascale 產(chǎn)品系列開(kāi)發(fā)的能力，為我們內(nèi)部針對(duì) DRAM內(nèi)存和Flash閃存的測(cè)試系統(tǒng)執(zhí)行完整 FPGA 設(shè)計(jì)，以及具備所有必需的相關(guān)經(jīng)驗(yàn)和行業(yè)知識(shí)； Experience to perform full FPGA design using Xilinx Kintex Ultrascale product families for our in-house DRAM and Flash based tester products with all required relevant experience, and industry knowledge. 2. 掌握?qǐng)?zhí)行完整 FPGA 架構(gòu)的設(shè)計(jì)和驗(yàn)證經(jīng)驗(yàn)，如使用 Verilog、System-C 語(yǔ)言進(jìn)行 IP 開(kāi)發(fā)、行為和 RTL 模塊仿真、將各種 IP 集成到最終模塊、綜合和復(fù)雜 FPGA 設(shè)計(jì)的時(shí)序收斂等。 驗(yàn)證整個(gè) FPGA 的完整功能，用于大規(guī)模原型、工程樣品和批量生產(chǎn)； Experience of performing full FPGA architecture, IP development using Verilog, System-C languages, simulation of behavioral and RTL blocks, integration of various IP into final block, synthesize, implementation, and timing closure of complex FPGA designs. Verify the full functionality of entire FPGA for mass prototype, engineering sample, and mass production. 3. 在仿真中執(zhí)行完整 DRAM 和閃存協(xié)議驗(yàn)證，以及在實(shí)驗(yàn)室使用真實(shí)硬件進(jìn)行調(diào)試； Experience of performing full DRAM and Flash protocol verification in simulation and bring up, debug in the lab using real hardware. 4. 根據(jù)最終設(shè)計(jì)規(guī)范審查最終產(chǎn)品的全面認(rèn)證和量產(chǎn)驗(yàn)證； Experience to review full validation and verification of final products against final design spec and release product to mass production. 5. 使用Xilinx 最新的現(xiàn)場(chǎng)可編程門陣列 (FPGA) 協(xié)同設(shè)計(jì)硬件產(chǎn)品； Experience of co-design Hardware products with field programmable gate array (FPGA) preferably using Xilinx latest FPGA devices. 6. 掌握在實(shí)驗(yàn)室中開(kāi)發(fā)產(chǎn)品并對(duì) DRAM、閃存和 FPGA 硬件解決方案進(jìn)行故障排除； Experience to bring up products in the lab and troubleshoot Hardware solutions for DRAM, Flash, and FPGA. 7. 與所有公司內(nèi)部技術(shù)團(tuán)隊(duì)進(jìn)行定期、主動(dòng)的溝通； Regular, proactive communication with all IM’s internal technical teams. 8. 為內(nèi)部和外部目的創(chuàng)建PPT等演示材料。 Creation of presentation material for internal and external purpose. 二、 任職要求：Qualifications: 1. 擁有5 年直接相關(guān)經(jīng)驗(yàn)的電子工程博士或碩士學(xué)位，或8 年直接經(jīng)驗(yàn)的電子工程學(xué)士學(xué)位； Philosophy Doctorated in electrical engineering (Ph.D. EE) or Master degree in electrical engineering (MSEE) and 5 years of direct experience or Bachelor degree in electrical engineering (BSEE) and 8 years of direct experience of equivalent experiences. 2. 至少 5 年半導(dǎo)體行業(yè)經(jīng)驗(yàn)，最好是 DRAM 內(nèi)存和閃存產(chǎn)品線相關(guān)； Minimum 5 years Semiconductor industry experience, ideally in DRAM and Flash product lines. 3. 能夠在全球和多樣化的環(huán)境中勝任團(tuán)隊(duì)合作，能夠與不同層面的所有團(tuán)隊(duì)成員互動(dòng)，包括FPGA、固件、軟件、硬件設(shè)計(jì)、PCB 布局、測(cè)試工程、供應(yīng)鏈等； Ability to work in a global and diverse environment. Strong team spirit. Ability to interact with all team members on different levels: FPGA, Firmware, Software, Hardware design, PCB layout, Test Eng, MFG, Quality, FAE, Sales, Procurement, Supply Chain, or C-level. Ability to work with international team across geographically dispersed area. 4. 優(yōu)秀的溝通能力，口頭和書面熟練使用英語(yǔ)和普通話。 其它語(yǔ)言專業(yè)知識(shí)是加分項(xiàng)。 Language skills: Excellent communication, verbal, and written fluency in English and Mandarin. Additional language expertise is a plus. 5. 積極主動(dòng)的專業(yè)態(tài)度，愿意學(xué)習(xí)和提高現(xiàn)有的知識(shí)儲(chǔ)備。 Proactive and professional attitude. Willing to learn and improve upon your existing knowledge. 三、 福利待遇：Welfare benefits 1. 雙休，帶薪年假及福利假期；下午茶點(diǎn)/自主咖啡/圖書角/各種沙龍； 2. Double leave, paid annual leave and welfare leave; Afternoon tea/independent coffee/book corner/various salons; 3. 入職全額繳納保險(xiǎn)，六險(xiǎn)一金；節(jié)假日各種福利/禮金； 4. Full payment of insurance, six insurance and one gold fund; Various holiday benefits/gifts； 5. 30多年半導(dǎo)體領(lǐng)域的國(guó)際團(tuán)隊(duì)；International team in semiconductor field for more than 30 years. 6. 開(kāi)放、全新的辦公場(chǎng)所；Open, brand new office space. 7. 工作地址：山東濟(jì)南舜泰北路789號(hào) Building A, No. 789, Shuntai North Road , Jinan,Shandong